[Series 03] Reliable Processing-in-Memory

Speaker: Jeageun Jung

Title: Reliable Processing-in-Memory

Date: October 1st, 2024 at 3:30 pm

Location: EER 3.646 or Zoom Link

Abstract:

Processing-in-memory (PIM) architectures enhance performance by integrating compute units near memory but introduce reliability challenges. Bank-PIMs maximize performance by placing compute units near memory banks but limit error-checking and correcting (ECC) to local domains, making it insufficient to handle faults and scaling-induced errors.

Bio:

Jeageun Jung’s research addresses this reliability gap by developing a PIM-specific ECC scheme tuned for the expected fault and error patterns expected in near-bank PIMs. To do this, Jeageun Jung also develops a new DRAM physical fault model based on empirical data that accurately predicts fault behavior across memory types.