I recently saw a reference to a future Intel “Atom” core called “Tremont” and ran across an interesting new instruction, “CLDEMOTE”, that will be supported in “Future Tremont and later” microarchitectures (ref: “Intel® Architecture Instruction Set Extensions and Future Features Programming Reference”, document 319433-035, October 2018). The “CLDEMOTE” instruction is… read more
New Year’s Updates
As part of my attempt to become organized in 2019, I found several draft blog entries that had never been completed and made public. This week I updated three of those posts — two really old ones (primarily of interest to computer architecture historians), and one from 2018: July 2012:… read more
SC18 paper: HPL and DGEMM performance variability on Intel Xeon Platinum 8160 processors
Here are the annotated slides from my SC18 presentation on Snoop Filter Conflicts that cause performance variability in HPL and DGEMM on the Xeon Platinum 8160 processor. This slide presentation includes data (not included in the paper) showing that Snoop Filter Conflicts occur in all Intel Scalable Processors (a.k.a., “Skylake… read more