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Archives for August 2023

August 28, 2023, Filed Under: Cache Coherence Implementations, Cache Coherence Protocols, Computer Architecture

“Memory directories” in Intel processors

One of the (many) minimally documented features of recent Intel processor implementations is the “memory directory”.   This is used in multi-socket systems to reduce cache coherence traffic between sockets. I have referred to this in various presentations as: “A Memory Directory is one or more bits per cache line… read more 

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Recent Posts

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  • “Memory directories” in Intel processors
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accelerated computing arithmetic cache communication configuration coprocessor Distributed cache DRAM Hash functions high performance computing Knights Landing memory bandwidth memory latency microprocessors MMIO MTRR Multicore processors Opteron STREAM benchmark synchronization TLB Virtual Memory Xeon Phi

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