According to Dr. Bandwidth, performance analysis has two recurring themes: How fast should this code (or “simple” variations on this code) run on this hardware? If I am analyzing (apparent) performance shortfalls, how can I distinguish between cause and effect? For very simple codes, it may be possible to do… read more
Performance
Comments on timing short code sections on Intel processors
(From a recent post of mine on the Intel software developer forums — some potentially useful words to go along with my new low-overhead-timers project…) Updates on 2019-01-23 in blue. There are lots of topics that you need to be aware of when attempting fine-grain timing. A few of the… read more
A peculiar throughput limitation on Intel’s Xeon Phi x200 (Knights Landing)
A peculiar throughput limitation on Intel’s Xeon Phi x200 (Knights Landing) Introduction: In December 2017, my colleague Damon McDougall (now at AMD) asked for help in porting the fused multiply-add example code from a Colfax report (https://colfaxresearch.com/skl-avx512/) to the Xeon Phi x200 (Knights Landing) processors here at TACC. There was… read more