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Performance

December 5, 2013, Filed Under: Computer Architecture, Performance

Memory Bandwidth on Xeon Phi (Knights Corner)

A Quick Note There are a lot of topics that could be addressed here, but this short note will focus on bandwidth from main memory (using the STREAM benchmark) as a function of the number of threads used. Published STREAM Bandwidth Results Official STREAM submission at: http://www.cs.virginia.edu/stream/stream_mail/2013/0015.html Compiled with icc… read more 

July 14, 2013, Filed Under: Computer Hardware, Performance, Performance Counters

Notes on the mystery of hardware cache performance counters

In response to a question on the PAPI mailing list, I scribbled some notes to try to help users understand the complexity of hardware performance counters for cache accesses and cache misses, and thought they might be helpful here…. For any interpretation of specific hardware performance counter events, it is… read more 

January 17, 2013, Filed Under: Performance

STREAM version 5.10 released

After much too long a delay, version 5.10 of the STREAM benchmark has been released (at least in the C language version). Although version 5.10 of the benchmark still measures exactly the same thing as previous versions, a number of long-awaited features have finally been integrated. Updated Validation Code Array… read more 

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accelerated computing arithmetic cache communication configuration coprocessor Distributed cache DRAM Hash functions high performance computing Knights Landing memory bandwidth memory latency microprocessors MMIO MTRR Multicore processors Opteron STREAM benchmark synchronization TLB Virtual Memory Xeon Phi

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